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FPGA-Smart-Traffic-Light-Controller
FPGA-Smart-Traffic-Light-Controller PublicFSM-based Smart Traffic Light Controller implemented in Verilog on Artix-7 FPGA with pedestrian crossing, emergency override, and night mode support.
Verilog
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UART-Transmitter-Receiver-Verilog-FPGA
UART-Transmitter-Receiver-Verilog-FPGA PublicUART Transmitter and Receiver implementation in Verilog HDL with baud rate generation, FSM-based TX/RX architecture, simulation verification, and FPGA implementation on Basys 3 (Artix-7).
Verilog
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