Pinned Loading

1. RISC-V-Pipelined-Processor RISC-V-Pipelined-Processor Public

   A 32-bit RISC-V pipelined processor supporting RV32I and RV32M with hazard detection and forwarding.

   Verilog

2. Z16-ISA-Simulator Z16-ISA-Simulator Public

   A Z16 instruction set simulator that disassembles and executes Z16 machine code programs.

   C++ 1

3. microsoft/clarity-mcp-server microsoft/clarity-mcp-server Public

   A Model Context Protocol (MCP) server for Microsoft Clarity

   TypeScript 86 32

4. Signed-8by8-SPM Signed-8by8-SPM Public

   A sequential 8×8 signed Serial-Parallel Multiplier using FSM-based design on Basys 3 FPGA with user-controlled input and 7-segment output.

   Verilog

5. Yara-5/DSP_Project Yara-5/DSP_Project Public

   Python