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QLI2.0 | Shikra SoC boot enablement: LLCC, EDAC, and TLMM GPIO reserved ranges #740

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Merged
sgaud-quic merged 3 commits into from
Jun 19, 2026
+36 −0
Merged

QLI2.0 | Shikra SoC boot enablement: LLCC, EDAC, and TLMM GPIO reserved ranges #740

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df503ac
FROMLIST: soc: qcom: llcc: Add configuration data for Shikra SoC
Komal-Bajaj May 29, 2026
234030f
PENDING: arm64: dts: qcom: shikra: Add gpio-reserved-ranges to tlmm
apateriy-qcom Jun 18, 2026
116d8ce
PENDING: soc: qcom: llcc: Skip ECC interrupt setup on Shikra, pre-con…
faiyaz-mohammed Jun 17, 2026
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2 changes: 2 additions & 0 deletions arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -504,6 +504,8 @@
};

&tlmm {
gpio-reserved-ranges = <6 4>, <14 4>, <30 2>, <115 2>, <138 1>, <155 11>;

dmic_eldo_en_default: dmic-eldo-default-active-state {
pins = "gpio71";
function = "gpio";
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2 changes: 2 additions & 0 deletions arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -426,6 +426,8 @@
};

&tlmm {
gpio-reserved-ranges = <6 4>, <14 4>, <30 2>, <115 2>, <138 1>, <155 11>;

dmic_eldo_en_default: dmic-eldo-default-active-state {
pins = "gpio71";
function = "gpio";
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2 changes: 2 additions & 0 deletions arch/arm64/boot/dts/qcom/shikra-iqs-evk.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -504,6 +504,8 @@
};

&tlmm {
gpio-reserved-ranges = <6 4>, <14 4>, <30 2>, <115 2>, <138 1>, <155 11>;

dmic_eldo_en_default: dmic-eldo-default-active-state {
pins = "gpio71";
function = "gpio";
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30 changes: 30 additions & 0 deletions drivers/soc/qcom/llcc-qcom.c
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Expand Up @@ -1775,6 +1775,20 @@ static const struct llcc_slice_config sdm845_data[] = {{
},
};

static const struct llcc_slice_config shikra_data[] = {
{
.usecase_id = LLCC_ECC,
.slice_id = 26,
.max_cap = 256,
.priority = 3,
.fixed_size = true,
.bonus_ways = 0x3,
.cache_mode = 0,
.activate_on_init = true,
.vict_prio = true,
},
};

static const struct llcc_slice_config sm6350_data[] = {
{
.usecase_id = LLCC_CPUSS,
Expand Down Expand Up @@ -4006,6 +4020,16 @@ static const struct qcom_llcc_config sdm845_cfg[] = {
},
};

static const struct qcom_llcc_config shikra_cfg[] = {
{
.sct_data = shikra_data,
.size = ARRAY_SIZE(shikra_data),
.reg_offset = llcc_v2_1_reg_offset,
.edac_reg_offset = &llcc_v2_1_edac_reg_offset,
.irq_configured = true,
},
};

static const struct qcom_llcc_config sm6350_cfg[] = {
{
.sct_data = sm6350_data,
Expand Down Expand Up @@ -4163,6 +4187,11 @@ static const struct qcom_sct_config sdm845_cfgs = {
.num_config = ARRAY_SIZE(sdm845_cfg),
};

static const struct qcom_sct_config shikra_cfgs = {
.llcc_config = shikra_cfg,
.num_config = ARRAY_SIZE(shikra_cfg),
};

static const struct qcom_sct_config sm6350_cfgs = {
.llcc_config = sm6350_cfg,
.num_config = ARRAY_SIZE(sm6350_cfg),
Expand Down Expand Up @@ -4954,6 +4983,7 @@ static const struct of_device_id qcom_llcc_of_match[] = {
{ .compatible = "qcom,sc8180x-llcc", .data = &sc8180x_cfgs },
{ .compatible = "qcom,sc8280xp-llcc", .data = &sc8280xp_cfgs },
{ .compatible = "qcom,sdm845-llcc", .data = &sdm845_cfgs },
{ .compatible = "qcom,shikra-llcc", .data = &shikra_cfgs },
{ .compatible = "qcom,sm6350-llcc", .data = &sm6350_cfgs },
{ .compatible = "qcom,sm7150-llcc", .data = &sm7150_cfgs },
{ .compatible = "qcom,sm8150-llcc", .data = &sm8150_cfgs },
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